Uninterruptible Power Supplie (UPS) - Common Topologies - Online Article


Within thephotoelectric-sensor arena, the diffuse sensing mode has become muchmore prevalent with the development and refinement of backgroundsuppression—the ability of a sensor to see an object and ignore thereflective surface directly behind it. This is a contributing factor tothe diffuse mode's emergence as the preferred method of photoelectricsensing.

The Ascent of Diffuse PhotoelectricSensors

This group of sensors—unliketransmitted-beam and retroreflective sensors, which detect when theirlight beam is broken or blocked—relies on sensing light reflected off atarget. They are therefore more sensitive to target characteristics,such as color, surface irregularities, shape, position, andreflectivity.

For this reason, transmitted-beam andretroreflective photoelectric sensors offer more reliable sensing,regardless of the target characteristics. The use of these beam-breaksensors, however, requires access to both sides of the application anddemands extra labor, cost, and space for the separate receiver unit, orreflector.

Advances in optics have made diffusephotoelectric sensors more viable as a long-range solution. Althoughthey do not offer the sensing distances of transmitted-beam andretroreflective modes, they have enough range to address a greaternumber of applications than a decade ago.


Although other diffuse-mode sensors,such as fixed-focus and sharp-cutoff models, offer a degree ofbackground suppression, true background-suppression photoelectrics aredesigned specifically for applications requiring the sensor to see atarget very close to a reflective background. This backgroundsuppression is particularly effective when the target and backgroundhave similar reflectivity (e.g., light returned to the sensor from thetarget is roughly equal to the light reflecting from the background) orwhen dark targets are to be sensed against a lighter, more reflectivebackground.

Background-suppression technology, in itstrue form, uses light triangulation to create a distinct focal planethat is the effective sensing area. Targets beyond the focal plane willnot be detected. Unlike fixed-focus and sharp-cutoff sensors thatachieve background suppression through their inability to see thebackground, true background-suppression sensors actively sense bothtarget and background. If we liken the operation of these sensors tohuman eyesight, a fixed-focus or sharp-cutoff photoelectric cannot seethe background because it is outside of its field of vision.Background-suppression sensors see the background but choose to ignoreit. They achieve this by virtue of dual receiving elements, R1 and R2.If an object is located between the focal plane and the receiver, thebeam falls on receiver R1. If the object moves out of the focal plane,the beam falls on receiver R2. So presence of a target is based on acomparison of the light seen by the two opto-receivers. If the amountof light at R1 is less than or equal to that at R2, the sensor outputchanges state, indicating target presence. Conversely, if the light atR2 is greater than that at R1, the sensor output remainsde-energized.

The sensing distance ofbackground-suppression sensors is categorized as either fixed oradjustable. Fixed background suppression has a stationary focal planeset by the manufacturer, so the application must be set up toaccommodate the fixed sensing distance. In adjustable backgroundsuppression, however, the sensing distance can be dialed in to suit theapplication. Turning an adjustment knob on the sensor changes the angleof an internal mirror and, therefore, the focal distance. Unlikefixed-focus sensors that are sensitive only at the focal point,background-suppression models are sensitive to objects anywhere in thefocal plane. So the adjustment of a fixed-focus sensor equates to achange in sensitivity, whereas the adjustment of abackground-suppression sensor moves the focal plane while sensitivityremains constant.

In an on-line UPS the Inverter supplies the load always irrespective of whether mains power is healthy or not.The load is always left connected to Inverter and hence there is no transfer process involved.When the mains power is present it is rectified and put in parallel with the battery.The charging current through the battery and the load current component come from the controlled rectifier when the mains is present.Hence all the supply system transients are isolated at the battery node and the Inverter always delivers pure sine wave of constant amplitude to the load.On-Line UPS affords maximum power quality enhancement to a critical load.The flip side is that they tend to be somewhat complex in design,higher in cost,lower in efficiency,bigger in size and tough on the battery compared to off-line units.

On-line UPS Topology

Fig.1 shows the online UPS topology in the single phase case.The mains input is stepped down to a lower level (because (i) isolation is required (ii) the battery voltage is usually low compared to peak of supply voltage and it may be desirable to run the SCR converter from a lower a.c voltage in order to reduce the harmonic in the line and to improve the power factor in the mains) and applied to a thyristor based phase controlled a.c to d.c converter employing a (firing angle ) control.The d.c side choke Lf1 smoothes the current delivered by the converter to near d.c.The PWM Inverter , which usually employs Sine Wave Pulse Width Modulation using triangular carrier ,runs off the battery node.The output of the Inverter is filtered in Lf3 and Cf2 to remove the switching frequency components before feeding to the load.The PWM Inverter is switched in the frequency range 5-20 kHz depending on the power rating and hence the d.c side current drawn by the Inverter will contain switching frequency components.The capacitor Cf1 and inductor Lf2 prevent the switching frequency currents from reaching the battery.The inductor Lf2 is usually small in value since it has to provide a high reactance only at switching frequency.Quite often it is dispensed with and a large valued capacitor Cf2 along with the inevitably present battery internal resistance will be sufficient to filter the high frequency components in the d.c side current of the Inverter.

The a.c side load on the inverter draws sinusoidal current (assuming linear load) and the instantaneous power output is a sin2 wt waveform.By the principle of power conservation,neglecting filter energy storages and power losses in the Inverter,the d.c side instantaneous power must be equal to a.c side power.Hence d.c side current will contain a sin2wt wave shape (embedded in the switching frequency ).The switching frequency components go into Cf2 and the sin2wt component goes into the battery node.If Lf2 had a large value it would have forced the Cf2 to absorb the 100 Hz component in the sin2wt wave shape and then the current from the battery node would have been d.c.But the value of Lf2 is not high enough in practice since it is required to provide a high impedance only at switching frequency. Thus 100 Hz component also flows from battery node. Thus, at the battery node, the incoming current from the converter is almost d.c and the outgoing current to the Inverter has prominent ripple along with d.c content. The difference in the average values of incoming current and outgoing current will go into or out of battery as the charging or discharging current.The control system will ensure that this difference is such that the battery will get a charging current (if it needs it). But along with this charging current, the second harmonic component of d.c side current of the inverter also will flow into the battery because the d.c side choke on the converter output will not permit it to flow into it.This second harmonic is quite large in value (as large as the power bearing d.c component) and this represents unnecessary strain on the battery even when the power is drawn from mains only and even when battery is floating with full charge and zero charging current.This is one of the major disadvantages of this topology since it affects the battery life adversely.

This problem of ripple current in the battery is severe in the case of a UPS with a short back-up time.Consider a 500VA UPS designed for 0.6 lag p.f and 15 minutes back-up time running from a 24V battery. At full load, assuming about 80% efficiency the average content at the input of Inverter will be about 16 amp.The battery will have an AH rating of 7AH.And the battery will carry a second harmonic ripple of about 16 A amplitude when the mains is present and the output load is 300W resistance.The ripple will be more if there is reactive load also at the output.The ripple current is more than two times the AH rating of the battery and battery life will suffer considerably with this level of idle ripple current.Note that the d.c charging current in the battery will be 0.7 amp only (about 10% of AH rating).A solution to this problem is to isolate the battery from the converter output by means of a power diode in such a way that when mains is available current will not flow from/into the battery from that node.This is accomplished by controlling the converter output voltage to be above the battery voltage level and back biasing the diode with the difference.When the supply goes off, the converter output voltage falls ,the interconnecting diode gets forward biased and battery takes over the job of supplying the inverter smoothly.The minus points of this scheme are the power loss in the interconnection diode and the need for a separate charger circuit for the battery.But the required charging current is low (usually between 0.5A to 2A) and simple charger schemes can be used to do the job.In the absence of battery to absorb the d.c side current ripple from the inverter ,the capacitor Cf2 should be large enough to absorb the ripple without distorting the d.c bus voltage much.If there is distortion in the d.c bus voltage the inverter output will get distorted with third harmonic content if the modulation scheme is simple Sine PWM without waveshape feedback control.

When the mains is present, the load power flows though the converter, reaches the battery node and from there flows into the Inverter i.e. there is double conversion of power. The converter, Inverter and the two level shifting transformers incur power losses in this process. Hence the efficiency of this topology is lower than in off-line topology. And the power loss in the battery due to the flow of ripple current as explained above results in further deterioration of efficiency.

The control of the Inverter is straight-forward.The SPWM inverter modulation index is varied to maintain the output voltage amplitude constant against variations in the output load and battery voltage.The control of input converter is based on sensing the battery bus voltage and battery line d.c current.In a properly designed control system, the battery voltage is measured and compared with a set float value.The error is processed in a proportional controller and the processed error decides the charging current that should flow into the battery.This decision is influenced by the manufacturer's recommendation for charging the battery.Thus the battery voltage control loop provides an output which becomes the reference input for an inner current control loop.The inner current control loop has to be a feedback loop with PI control and should control the firing angle a of the thyristor converter in such a way that the battery current is maintained at the required value with zero steady state error.When the load at the output increases, the d.c current drawn by the Inverter from battery node increases ,thereby causing a decrease in the battery charging current.This dip is sensed by feed back system and firing angle is increased to such a level that the converter output current rises to the value needed to supply the increased demand from the Inverter while maintaining the same old value of charging current in the battery.In this scheme of control the battery never goes into a discharge mode while the mains is present unless the line voltage comes to too low a value and the SCR firing angles saturate. In addition, the charging current in the battery will not change with the changes in the output load level on the UPS.

However, many commercial on-line UPSs available in the market (especially in the 0.5kVA to 10kVA range) dispense with the inner current control loop.The battery voltage is compared with the float voltage level and the error is used to control the firing angle of the converter directly through a proportional controller. In this scheme, the battery charging current will decrease with decrease in mains voltage and increase in the output load. And often it is found that the battery is in discharging mode even when mains is present i.e. the battery shares the load current with the mains.This happens when the mains voltage is low and/or the output is loaded to above 75%.If such UPSs function at high loading levels in low supply voltage areas ,the battery will never get an opportunity to charge up fully and consequently the back up time that the UPS yields will be much below the rated value.Adding integral control in this scheme can redeem the situation but will bring in stability problems and attendant issues of control system compensator design.

At high power ratings it is possible to avoid using the output transformer and provide isolation only at the input side.This will require a 360V battery and the inverter will generate 230V straight from the 360V battery bus.In fact, high battery voltage becomes unavoidable at higher ratings for reducing the level of current to be switched in the Converter and Inverter. In addition, three-phase input side will be preferred at higher ratings(above 5kVA) in the interest of improved power factor,lower current harmonics at input and avoidance of triplen harmonics in the a.c side current.  

With stringent harmonic restrictions in the offing, on-line UPS systems will be required to comply with harmonic injection standards in future. This will result in a replacing of thyristor phase controlled converter by Boost type power factor corrector stage to ensure sinusoidal input current at unity power factor. This system is especially attractive at higher ratings. The boost type PFC can work directly from line generating current flow into a 360V battery node. The control is much simplified since the battery across the output of PFC will make a voltage control loop redundant simple current control loop with a battery current reference set based on the battery voltage will do. The inverter can run directly from the 360V bus and generate 230V output. An output transformer is optional and is needed only if isolation from mains is essential.

The Line Interactive UPS Topology

There are many topologies in the literature, which claim the title of line interactive UPS.However there is no agreement on the definition. One particularly popular topology, which has found its way into the market, is described here.

Fig.2 shows the power circuit diagram of a line interactive UPS.The d.c side filter, which will be needed to avoid switching frequency current flow into the battery, is not shown. In addition, isolation and level translation, if required, will be effected by a 50 Hz transformer at the output of the inverter.

When the line is present ,the inverter (which is a unipolar PWM voltage source Inverter) is gated in such a way that the current drawn from the mains will be a sine wave with active component sufficient to meet the active power demand of load and battery charging and reactive component sufficient to meet the reactive power requirement of load and to maintain the load voltage at a fixed amplitude. In this UPS the output voltage is maintained constant by drawing varying amount of reactive power from the line when the line voltage changes. When the mains go off, the Inverter maintains supply to the load uninterrupted and the connection to the mains will be broken to avoid back-feeding into the line.

This UPS maintains almost comparable performance with that of on-line versions;especially when isolation transformers are used and can be more efficient. However, the control is more complex.

The control scheme is as follows. The battery voltage is sensed and compared with its float level to decide the amount of charging current that must flow into it. The actual charging current is sensed and compared with this desired charging current. The error is multiplied with a unit amplitude sine template (generated by phase locking the a.c source voltage) and the product forms one part of current that must flow into the Inverter through the inductance L.

The load voltage magnitude is sensed and compared with a reference value. The error is multiplied by a unit amplitude cosine template with proper polarity and the product forms the reactive current that must flow into the inverter.

The two product contributions are added and the sum is given as the current reference into the current controller, which gates the Inverter suitably. This current controller can be a hysterisis current controller or feed forward current controller.

The load may be non-linear like a PC.Then it will draw harmonic currents. These harmonic currents will flow into the inverter and not into the line since the line current is controlled to contain only pure sine and cosine contributions. Even if current control is only approximate (for e.g. feed forward scheme without any feed back from actual current ,in order to avoid a current sensing hardware) the harmonics will flow into Inverter mostly since the inductance L (which will be much larger than the switching frequency filter inductance Lf) will present a high impedance to harmonic current flow.

Thus this topology delivers high quality power to load (always from Inverter),maintains the load voltage constant even when mains voltage varies,maintains constant current charging of the battery even when the load/mains voltage change and does all this while maintaining the supply line current almost sinusoidal i.e. it does active power filtering too. The only thing it does not do is to maintain the mains power factor at unity. But then line p.f can not be unity if load voltage is to be constant when mains voltage varies. It is by controlling the reactive power flow that the UPS maintain the load voltage constant.

Output Waveshape , THD Specification and UPS Output Impedance

Sinewave UPS is always the preferred type when used with most of today’s quality computer power supplies. There is less of a chance for interaction problems when a pure Sinewave UPS is used, and the UPS will be able to easily be employed with another quality computer system at a later date, without worrying about new interaction problems.

The Sinewave UPS will not be feeding a computer system an output waveform that has a high degree of "noise content", so that its output will not be acted upon by surge circuits or by noise filtering circuits either inside the computer power supply that is plugged into the UPS, or by a surge strip or 'under-the-monitor' type convenience switch center (that happens to contain surge or noise circuits) used between the computer and the UPS. There will be no significant MOV or Capacitance-Inductance problems upstream of a pure Sinewave UPS. Research shows that the 'cutoff' point for an acceptable UPS waveform for any computer containing a power supply that has surge suppression and/or noise filtering circuits is a quasi-Sinewave UPS with a THD (Total Harmonic Distortion) of less than 28%. This group includes all pure Sinewave UPS and some Line Interactive Quasi-Sinewave UPSs, if the THD is less than 28%. An UPS with less than 28% THD, and certainly a UPS with a pure Sinewave, is not expected to cause any problem to the SMPS unit inside the PC.

A step wave Standby UPS, with greater than a 28% THD when on inverter, can, depending upon the frequency of inverter output and the type of surge suppression and noise filtering in the PC power supply, degrade both the computer power supply and the UPS itself. The amount of noise on the UPS output wave is dependent upon the % load of the UPS (lower at full load, higher at lighter load), and is higher at any 'switchover' point to battery and at low battery charge levels. So, the THD % quoted by some manufacturers may not be all that realistic. Some manufactures specify THD values that only apply at 100% load, and only with a resistive type load, so that inevitably the THD values specified are at best reliable only under these somewhat contrived test conditions (after all a UPS is hardly ever used to supply a heater load). Step wave UPSs can be used with older CBEMA power supplies that contain no built-in surge suppression or noise filtering, and when NO surge suppression or noise filtering circuits are placed between that UPS and the computer. Such a stepped wave UPS (less than 28% THD when on inverter) cannot reliably be used with many non-CBEMA compliant computer power supplies (they can't ride the switch-over time), or under all circumstances with power supplies that contain surge or noise suppressing circuitry.

Many quality computer power supplies contain Inductive-Capacitive bi-directional filtering circuits to prevent injection of "line noise" onto the Neutral line of the electrical system that the LAN nodes connect to, and to prevent 'Neutral line harmonics', especially the odd numbered multiple frequencies (3rd and 9th harmonic), from getting into the computer itself. Most modern power supplies contain MOV surge suppression circuits and some sort of noise filtering. This is why, without knowing the specific power conditions of a customer’s site, or the specific type of surge suppression and noise filtering circuitry in the particular computer,one can not recommend using a product that might cause problems, i.e. a UPS with more than a 28% THD, when operating in inverter mode. There is simply no easy way to determine how many inverter cycles a UPS in a given site will undergo, and there is no easy way to determine what specific type of surge suppression and noise filtering a given computer has in its power supply. For this reason, it is definitely preferable that such computers be plugged into a pure Sinewave UPS or into a quality 'quasi-Sinewave' UPS that has low harmonic distortion in the UPS output; less than 28%, lower THD being better. A Pure Sinewave UPS will have a THD of between 2% and 5%.

The inductive-capacitive bi-directional filtering built into today’s quality power supplies is designed to "clean up" to a small degree some of the "electrical noise" that the utility feeds the computer, and also, what the computer throws back at the utility. However, these inductive-capacitive filters produce heat when they filter electrical noise and have a limited life; they wear out. They also combine with MOVs commonly found in modern computer power supplies, to handle the normal electrical noise found in the utility supplied AC, but are not designed to filter out the very distorted high THD % on-battery waveforms of stepped wave UPSs. When these circuits try to 'clean up' the distorted output of the stepped wave UPS containing rapid changes in wave shape, unmatched impedance reflections caused by the Inductive coils and capacitors in the computer power supply and MOV clamping of this distorted UPS stepped waveform can occur, causing the computer power supply and the UPS to both wear out faster. When we have the typical Inductive coils and capacitors, along with MOVs, in a filtering/surge circuit, and "feed" this circuit distorted UPS stepped waves, this also causes ringing of the MOVs, and this also increases the tendency of the MOV to heat up, and accelerates its degradation.

The most common failure points would be the surge/filtering circuits of the power supply, and other heat and electrical stress related failure points of the supply and the computer system attributable to the high THD % of the power source. Toward the 'end-cycle' one would start seeing intermittents such as the system freezing up or rebooting, but the system will have aged to a degree -more- owing to the UPS waveform THD %.

A PFC power supply will be stressed if it is fed a noisy waveform from any type of UPS. PFC is now mandatory in Europe. The IEC555 European standard covers this. The PFC topology most prevalent for fewer than 300 VA computers is the "Passive" PFC type, which incorporates harmonic filters. Usually the PFC topology of choice for computers drawing more than 300 VA is the "Active" PFC topology, which incorporates the high frequency switching circuits which shape the input current to reduce harmonics. Both types draw Sinewave current as opposed to the pulse current of switch mode power supplies. The "Passive" PFC power supplies (< 300 VA) have been shown to be incompatible with stepwave ups sources, and the "active" pfc power supplies have been shown to be incompatible with Ferro-resonant sources as well as stepwave ups sources. It is absolutely necessary, then, for a low impedance UPS with Sinewave or near Sinewave output to be used with "Active" PFC power supplies, and certainly advisable if not absolutely necessary, for the same to be used with "Passive" PFC power supplies.

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